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- Job title: Senior FPGA Engineer
- Client: High-Frequency Trading
- Location: Sydney (Hybrid)
- Salary: Up to AU$350,000 (very negotiable DOE) + benefits
An elite-level HFT firm in Sydney is looking for a talented and passionate Senior FPGA Engineer. you will be at the forefront of developing ultra-low latency solutions, optimising trading algorithms, and designing high-performance hardware to gain a competitive edge in the financial markets.
Desired Experience
- PhD or Master's degree in Electrical Engineering, Computer Science, or related field
- 5+ years of experience in FPGA development, preferably in low-latency or high-performance systems.
- Proficiency in HDL languages such as Verilog, VHDL, or SystemVerilog.
- Expertise in FPGA design tools (e.g., Xilinx Vivado, Altera Quartus, Synopsys).
- Strong understanding of low-latency networking protocols and hardware/software co-design.
- Experience with high-speed transceivers, memory interfaces, and timing analysis.
- Solid programming skills in C/C++ or Python for system integration.
- Knowledge of financial markets and trading systems is a plus but not mandatory.
What they can offer you:
- Hybrid working
- Flexible holiday allowance
- Excellent name to have on your CV
- Highly attractive compensation
- Very friendly/collaborative environment
- Greenfield projects
- Flat structure, with a clear progression route
If interested, please apply to have your profile considered. Alternatively, you can reach out to me for a confidential chat directly via email: [email protected]
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