Field-Programmable Gate Arrays Engineer

We’re hiring!

About iENSO www.iENSO.com

iENSO makes Embedded Vision and Edge AI platforms for companies that need to include AI, image processing, and data connectivity capabilities in intelligent IoT Products that can output actionable data so that humankind can make better decisions and be more efficient. Our global network of expertise is in vision, design, development, and manufacture of optimized and scalable embedded vision systems for home automation, robotics, precision farming & agriculture, remote security, and medical equipment.

Our growing company is hiring for an FPGA Engineer.

Thank you in advance for taking a look at the list of responsibilities and qualifications.

We look forward to reviewing your resume!

Scope of Position:

• Salaried, Full-Time (40 hrs/ week)
• Salary: TBD + Benefits
• Date Posted: January 20, 2025

Requirements:

Reporting to the Solutions Engineering Manager, the FPGA Engineer will be responsible for the custom logic designs’ design, simulation, and optimization. Working closely with cross-functional teams, the job incumbent will be developing, testing, and optimizing FPGA and SoC-based solutions for high-performance applications as well as participating in static timing analysis, FPGA constraints, and embedded system development within a Linux-based design environment.

• Bachelor’s degree in computer science, electrical engineering, or related field;
• 6+ years of developing RTL designs using Verilog and SystemVerilog for complex digital systems;
• 2+ years of experience with C++ programming, preferably in embedded systems;
• Proficiency in RTL simulation and verification methodologies; has experience utilizing Verilator;
• Strong debugging skills for both software and hardware;
• Experience with FPGA constraint setup, static timing analysis, and optimizing FPGA builds;
• Proficiency with Linux-based design environments;
• Design experience with FPGA-based SoCs;
• Knowledge of Ethernet or packet-based networking designs for FPGA or ASIC implementations, with a deep understanding of Ethernet and IP packet processing;
• Experience with video FPGA designs and video baseband interfaces such as SDI and HDMI;
• Domain knowledge in Pro-AV/Broadcast or Imaging solutions is a strong plus;
• Eligibility to work in Canada;
• Some provincial travel may be required.

Essential Duties & Responsibilities:

• Develop RTL designs using Verilog and SystemVerilog for complex digital systems;
• Write and integrate embedded software in C++ for hardware interaction, testing, and debugging;
• Collaborate with software and firmware teams to ensure seamless integration of hardware and software components;
• Constrain FPGAs for static timing analysis and optimize FPGA builds for performance, resource usage, and power efficiency;
• Conduct RTL simulations (Verilator) to verify functionality, reliability, and timing;
• Collaborate with cross-functional teams, including hardware, software, and QA, to ensure project success.

In Accordance with the Accessibility for Ontarians with Disabilities Act (AODA), iENSO strives to ensure that all recruiting processes are non-discriminatory. If you require accommodation, please advise HR in advance of attending the interview.

Only candidates selected for an interview will be contacted. All other applicants are thanked for their interest.