Digital Design and Verification Engineer - UVM

Join a cutting-edge global semiconductor company, recognized for its leadership in automotive, industrial, and consumer electronics, where innovation drives everything they do!

The Personal Healthcare R&D team in Leuven is developing groundbreaking application-specific ICs for hearing aids, implants, wireless personal audio, and wearable health monitoring IoT applications. They're expanding their product development team and looking for an exceptional Digital IC Design and Verification Engineer to bring their expertise in digital hardware design and/or verification to the table.

This is a long-term contract based in Leuven, Belgium.

Flexible working is possible but must be at least 3 days onsite.

As a Digital Designer:

• Own your block from design specification to production, ensuring collaboration with verification and validation teams to meet performance targets.
• Optimize silicon area while achieving performance and power goals.
• Collaborate with the physical design, analog, and firmware teams to ensure seamless integration of the digital block.

As a Verification Engineer:

• Take full ownership of verification for a block, subsystem, or top-level functions.
• Detail and implement verification specifications using SystemVerilog, UVM, Python, and assertions.
• Maximize verification coverage while focusing on efficiency and execution time.
• Maintain and execute regression suites to meet challenging schedules with high-quality results.
• Participate in peer reviews, work with architects on design reviews, and conduct root-cause analysis and issue resolution.
• Collaborate across teams (Analog, Firmware, Layout) to ensure project success.

Profile:

• Master’s Degree in Electronic/Electrical Engineering.
• Minimum of 5 years’ experience in digital block and IC design or verification.
• Expertise in low-power design techniques.
• Knowledge of audio processing and AI accelerators is a plus.
• Proven success in delivering working silicon for high-volume products.
• Creative and innovative, with a strong drive to propose and implement improvements.
• Analytical and methodical with strong debugging skills for both design and silicon.
• Familiar with Cadence EDA tools and Synopsys Spyglass.
• Expert in VHDL, Verilog, and/or SystemVerilog; experience with Python is an asset.
• A collaborative team player with excellent communication skills in an international environment.
• Hands-on with practical skills and strong electrical knowledge.
• Fluent in English.

Interested? APPLY via LinkedIn or email me at [email protected] to arrange an initial call

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