Senior RTL Design Engineer (Paris or Zurich) - Visas Supported

Senior RTL Design Engineer

A fantastic opportunity for an experience RTL Design Engineer to join a renowned Semiconductor company, who designs, develops, and markets integrated circuits and modules for 4G and 5G cellular IoT devices, alongside their teams in either Zurich or Paris.

Within the VLSI team, your responsibilities will be to specify, design, implement and verify various digital blocks linked to the companies next chipsets generation.

Responsibilities:

• Design (RTL coding) of key digital building blocks.

• Requirements analysis and micro architecture (uarch) definition.

• Design optimization in the context of timing, power and area.

• Contribute to top-level integration, testing and debugging.

• Planning, Tracking and reporting of key activities.

• Preparing documentation and technical reports.

• Supporting verification and debugging.

• Third party IPs evaluation

Experience and Skills:

• Degree (BSc/MSc/PhD) in computer science, electrical engineering or equivalent studies.

• At least 5 years of working experience in ASIC and/or FPGA development.

• Strong command of hardware description languages (SystemVerilog/Verilog/VHDL).

• Background in optimization techniques for high throughput, low area, low power designs.

• Experience in multiple clock domains architectures.

• Experience in Front End activities (e.g Lint, CDC, RDC tools).

• Familiarity with Unix environment and shell programming/scripting (C-Shell, Tcl, Python).

• Experience in version control systems (Git, SVN).

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