FPGA Engineer

Title: FPGA Engineer

Type: 6 Months contract

Hybrid set-up: 3+ days onsite a week minimum

YOU MUST ALREADY OBTAIN / BE ELIGIBLE TO OBTAIN SECRET LEVEL SECURITY CLEARANCE

About Ovyo

Ovyo is a B2B services company providing flexible Engineering team & talent services to the streaming (video/media), space, satellite and comms industries.

About the role:

Here you will develop FPGA/RFSoC/Processor-based subsystems for non-geostationary orbit satellite payloads. The role involves designing regenerative on-board processors, digital beam-forming antennas, and user terminal modems. Candidates will work with FPGA, SoC, processors, and ASICs, integrating with space payloads and ground terminals.

Responsibilities:

• Design Satellite Payload Systems: Develop FPGA/SoC/ASIC-based radio access and modem platforms, optimizing performance, power, and silicon efficiency via RTL design.
• Implement DSP Algorithms: Create and integrate high-performance DSP algorithms on FPGAs, meeting strict latency, power, and throughput requirements.
• Validate and Test Systems: Build automated test benches, conduct prototype testing, lab validations, and in-orbit demos, integrating third-party firmware/software.
• Select Hardware Solutions: Choose radiation-tolerant FPGA/SoC/ASIC technologies, balancing cost, power, and throughput for satellite architectures.
• Support Integration and Documentation: Provide performance analysis, contribute to system design, and document specifications, trade studies, and test reports.

Requirements:

• Hold a Master’s or Ph.D. in Electrical or Computer Engineering
• Must have 7+ years of FPGA/SoC/ASIC design experience, preferably in the space sector.
• Expertise in DSP and FPGA Development: Apply strong knowledge of digital equipment development, focusing on high-speed DSP PCB design, FPGA/SoC/Processor architecture selection, and high-speed logic design.
• DSP Algorithm Design: Design, implement, and test DSP algorithms in RTL code, optimizing for area, power, and performance across multiple power/clock domains.
• Hands-On Hardware Experience: Demonstrate proficiency with Xilinx FPGA platforms (RFSoC, Versal Gen1/Gen2), Vivado IDE, and mixed-signal ICs (ADCs, DACs, modems, channelizers, beamformers).
• Interface and Verification Skills: Work with high-speed interfaces (JESD204C, PCIe, Ethernet) and low-speed interfaces (CAN, SPI, I²C, RS-422/485), using FPGA tools like ILA or Chipscope for verification.
• System Integration and Scripting: Support hardware bring-up, system integration, and develop scripts in Tcl or Python for automation and testing.
• MUST be eligible to obtain secret level security clearance

To apply for the role or for more information get in touch with the team at Ovyo at [email protected]