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YO IT Consulting

Verilog Design Engineer

YO IT Consulting
Slovenia · Contract · Mid-Senior

Hardware Design Developer

Experience: 3 - 25 Years

Location: - Permanent Remote anywhere in the World

Contract Length: 6 Months

Type: Full time contract(8 hrs/day) Overlap Hours: 4 hrs/day with PST

Mandatory Skills

Overall - 5 years of exp.

Min of 2 years of relevant experience in Hardware Design and/or Hardware Verification

Experience With One Or More On The List Below

  • >ASIC
  • >VLSI
  • >FPGA
  • >SOC

Experience with one or more on the list below

  • >SystemVerilog development
  • >Verilog development
  • >Testbench development and/or verification.

Good communication skills in English.

LLM experience is not mandatory, however, the candidate should be fine to work as a LLM Engineer for Verilog.

Must-Have

  • BS or MS degree in Electrical, Engineering, or related field.
  • 3-5 years of proven experience in hardware design development.
  • Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.
  • Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.
  • Expertise in UVM environments
  • Expertise in Formal Verification
  • Expertise in Lint process and refinement
  • Good communication skills in English

Job Description

We're searching for an exceptional hardware design Developer to play a pivotal role in using the hardware design platform to generate the training data to enhance enterprise LLMs' capabilities. This unique position offers the chance to directly contribute to the sophistication of enterprise LLMs, ensuring they operate with unparalleled efficiency and intelligence.

Your Mission

  • Develop, configure, and customize the hardware design platform, utilizing it to generate vital training data for enterprise LLMs.
  • Liaise with research teams to translate requirements into actionable data insights, directly impacting our LLMs' performance.
  • Uphold the highest standards in coding, debugging, and documentation, ensuring the hardware design solutions are optimized for LLM training and benchmarking.
  • Collaborate across teams to identify and prioritize needs, contributing to the LLMs' ability to understand and automate complex processes.

We Need

  • BS or MS degree in Electrical, Engineering, or related field.
  • 3-5 years of proven experience in hardware design development.
  • Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.
  • Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.
  • Exceptional problem-solving, communication, and collaborative skills.Familiarity with ML and AI systems

Skills: ai systems,verilog-a,soc,communication skills,hdl expertise,formal verification,hdl,integrations within hardware design environment,vhdl,collaboration,lint process refinement,systemverilog development,verification,hdls,knowledge of ml and ai systems,integration,verification workflows,communication,systemverilog,integrations,vlsi,fpga,lint process and refinement,hdls (verilog, systemverilog, vhdl, systemc),uvm environments,electronics hardware design,hardware design development,good communication skills,ai,front-end,hardware design,verilog development,systemc,lint process,front-end and verification workflows,scripting,coding,ml,front-end verification workflows,uvm,asic,front-end development,design,integration within hardware design environment,debugging,hardware verification,ml and ai systems,integrations within the hardware design environment,electrical engineering,verilog,problem-solving,familiarity with ml and ai systems,testbench development,documentation,collaborative skills,front-end workflows

Key Skills

Ranked by relevance

c ha ai kf emc vm fpga sla ui
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Posted
Nov 21, 2024
Type
Contract
Level
Mid-Senior
Location
Slovenia

Industries

Technology Information Internet

Categories

Engineering Information Technology

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