FPGA Verification Engineer
KRUSH LabsNetherlands17 hours ago
Full-timeOther
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Job Summary
Our company is developing a cutting-edge wireless communication system to connect multiple portable devices. Long range, high data rates, low latency, resistance to interferences, and multipath make this problem particularly challenging, giving the candidate unique opportunities to research, design, and implement the next-generation radio communication systems.
We are looking for an experienced FPGA Design and Verification Engineer to join our dynamic team. In this role, you will be responsible for creating and maintaining comprehensive design and verification flow and come up strategies to ensure the performance and reliability of our FPGA designs. You will have the opportunity to work on cutting-edge projects, leveraging your expertise in Verilog/SystemVerilog, UVM inspired verification flow using CocoTB, and FPGA/VLSI design to deliver high-quality solutions.
Key Responsibilities:
Our company is developing a cutting-edge wireless communication system to connect multiple portable devices. Long range, high data rates, low latency, resistance to interferences, and multipath make this problem particularly challenging, giving the candidate unique opportunities to research, design, and implement the next-generation radio communication systems.
We are looking for an experienced FPGA Design and Verification Engineer to join our dynamic team. In this role, you will be responsible for creating and maintaining comprehensive design and verification flow and come up strategies to ensure the performance and reliability of our FPGA designs. You will have the opportunity to work on cutting-edge projects, leveraging your expertise in Verilog/SystemVerilog, UVM inspired verification flow using CocoTB, and FPGA/VLSI design to deliver high-quality solutions.
Key Responsibilities:
- Develop lint-clean RTL modules based on system and algorithmic specifications.
- Integrate third-party IP blocks and ensure proper functionality within the FGPA system.
- Review and refine RTL code quality to ensure complete functional coverage.
- Support the enhancement of internal FPGA design, verification, and testing methodologies.
- Debug timing issues and contribute to timing closure during STA.
- Perform on-board debugging and using logic analyzers and related tools.
- 4+ years of experience in FPGA or VLSI (FrontEnd) design/verification.
- Minimum Masters Degree in Electrical/Electronic Communication Systems Engineering or Similar.
- Proficiency in SystemVerilog.
- Working knowledge of C/C++ and Python.
- Experience with structured, lint-clean RTL development.
- Understanding wireless communication and signal processing concepts such as MIMO and OFDM.
- Familiarity with verification methodologies or tools such as CocoTB.
- Experience with fixed-point DSP algorithm implementation in RTL is an advantage.
- Basic knowledge of Digital communication system theory.
- Strong analytical and problem-solving skills with a proactive approach.
- Effective communication and collaboration skills to work across multidisciplinary teams.
- Attention to detail and commitment to producing high-quality, reliable designs.
- Passion for innovation and shaping KRUSH Labs FPGA design and verification methodology.
Key Skills
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